Job description
Participate in the development of Physical Design (PD) methodologies across the RTL-to-GDSII flow using industry-standard tools (Cadence, Synopsys, Mentor). Perform lead level hands-on work in one or more areas including Synthesis, Formal Equivalence, Static Timing Analysis (STA), DRC/LVS/IR/EM Signoff at both module and top level. Take full ownership of the physical design process at the module level and provide support in top-level integration, collaborating closely with RTL designers, DFT teβ¦