Senior FPGA Engineer (VHDL/Verilog)

AGAD Technology
Description du poste
📍 België
💼 Temps plein
💰 À négocier
📅 Publié le 23/06/2026

Description du poste

As a Senior FPGA Engineer , you will contribute to the development of key components of our networking system, including SmartNICs and hybrid optical switches. You will be responsible for designing and optimizing VHDL and/or Verilog implementations. In the next phase, you will verify your designs in simulation by writing test cases and scenarioʼs within our Python simulation environment. You will integrate your designs and IP cores into our FPGA projects. Next to this, timing analysis and on-ta…

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